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University: University of Edinburgh
Sector(s): Life Sciences, Electronics, Sensors & Photonics, Healthcare & Pharmaceuticals, Information & Communications Technologies
Innovation in High Performance Computing
This new field programmable gate array (FPGA) core provides a high performance and versatile computing solution for generic pairwise sequence alignment. The technology facilitates application of FPGA technology for the efficient and accurate comparative analysis of large sequence datasets (for example, biological information), removing an existing computational processing bottleneck.
Sequence alignment involves the arrangement of data sequences in order to identify and provide important information on key regions of similarity. This pattern-matching process is utilised in the analysis of biological data (eg. DNA, RNA and proteins), natural language processing and stream data processing within network systems. Current methods for performing sequence alignment include software-based solutions, which can offer high levels of flexibility, but are not able to offer the desired combination of performance and accuracy.
This FPGA core delivers a high speed solution with significant acceleration when compared with equivalent ‘software only’ implementations, and with only a fraction of the power consumption. It is, therefore, an effective tool for operations normally requiring a cluster of computers. In addition to offering leading performance, compared with current FPGA-based parallel technologies for sequence alignment, the core is highly parameterised allowing user definition of processes and making it the most customisable FPGA-based solution reported.
A hardware form of an FPGA-based web server for sequence alignment of biological data has been successfully demonstrated. Comparative studies showed the FPGA technology to be in excess of 200x faster and 500x more power efficient than an equivalent general purpose processor for sequence alignment operations.
Copyright in source code
Key Publication: Benkrid et al, IEEE Transactions on VLSI Systems, 2009, 17, 4, 561-570
Development Status: Proof of concept
A licence to the source code for FPGA configuration is available from the University of Edinburgh.
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